We are an automotive supplier, a partner to all automakers worldwide. As a technological company, we design innovative products and systems that contribute to reduction of CO2 emissions and to development of automated driving. In our Research and Development center in Prague we employ seven hundred engineers. They are those who stand behind the latest systems of active safety (ADAS) and autonomous driving. What does it mean? Software, hardware engineers, together with mechanical designers, test and system engineers develop sensors and systems for safe and comfortable driving. Automated parking systems, automated emergency braking, blind spot detection and road sign recognition are just a few examples.

FPGA/ASIC Digital Design/Verification Engineer(VHDL)

Locality: Strašnice

Employment type: Full-time work

We are looking for an experienced FPGA/ASIC Digital Design Engineer/Verification Engineer (VHDL), who will be part of our strong R&D center focused on development of cutting edge technological products which are used in electrical cars.

YOUR CHALLENGES?

  • Technical responsibility of FPGA/ASIC core module design
  • Analyze, conceptualize and review internal and external requirements and their impact on the design modules
  • Create and maintain design/verification documents
  • RTL design, synthesis and design verification simulation
  • Perform design reviews to ensure the requirements are met
  • End to end ASIC simulation & verification and troubleshooting
  • Perform design rule checks, low power checks, clock and power distribution checks
  • Participate in performance, area, power, and system cost tradeoffs decisions
  • Timing analysis and back annotated simulation
  • Design for test including generation of test patterns
  • Work closely with design, verification and architect engineers

LET'S TALK ABOUT YOU...

  • Completed engineering studies (electrical engineering, computer science, automotive engineering, physics) or comparable training
  • Several years of experience with system, HW or FPGA/ASIC design
  • Programming skills such as VHDL/HDL and model simulations in VHDL or UVM
  • Initiative, ability to work in an international team, strong communication skills and enthusiasm for technology
  • Fluent English

WE OFFER:

  • 6 weeks of vacation per year
  • flexible working hours and home office possibility
  • variable remuneration - monthly and semester bonuses depending on your team's and corporate results
  • contribution to pension insurance after the probation period amounting to 5% of your gross salary
  • meal vouchers and free time vouchers on a Flexi Pass card (Edenred)
  • possibility of the Multisport card
  • fitness room and external sports ground (football, basketball, volleyball) on site
  • mobility support for commuting, accommodation and moving services if you live more than 20km away
  • a company canteen offering a selection of international cuisine
  • easy access to work by Prague metro line A, a parking lot for all employees
  • personal development program through technical trainings and language courses
  • regular company teambuilding events
  • outdoor relax zone with barbecue space for teambuildings
  • discounted prices of car spare parts and accessories
  • possibility to see the whole development process in one place from an idea (customer requirement) to a product testing and manufacturing

In case you are interested in this job offer, please send us your CV through the APPLY button below.

Contact

VALEO ČESKÁ REPUBLIKA
Alexandra Hulíková
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